Complete hardware-assisted verification system for integrated circuits |  Siemens EDA


Siemens EDA unveils its next-generation Veloce hardware-assisted verification system for rapid verification of integrated circuit designs. It is the first complete and integrated offer which combines a virtual platform, hardware emulation and FPGA (Field Programmable Gate Array) prototyping technologies and which paves the way for the exploitation of the latest hardware-assisted verification methodologies. .

According to the CAD specialist, this system takes the verification of hardware, software and systems to the next level of intelligent scanning by streamlining and optimizing verification cycles while helping to reduce verification costs.

The new products of the Veloce hardware-assisted verification system are:

  • Veloce HYCON (HYbrid CONfigurable) for virtual platform / software verification. Veloce HYCON offers innovative technology that enables customers to design and deploy complex hybrid emulation systems for their next generation system-on-chip (SoC) designs.
  • Veloce Strato +, an upgrade to the capability of the Veloce Strato hardware emulator. With a peak capacity of up to 15 billion doors, Veloce Strato + combines, according to the company, the highest total throughput in the industry with its fastest co-model bandwidth and visibility time.
  • Veloce Primo for enterprise-level FPGA prototyping, an in-house developed enterprise prototyping solution that combines industry-leading runtime performance with rapid prototyping commissioning.
  • Veloce proFPGA for desktop FPGA prototyping. With a modular approach to capacity, the Veloce proFPGA product family offers scalability across a range of capacity requirements. This highly consistent system sets a new standard for the future direction of hardware-assisted verification methodologies, says Siemens EDA.

The system takes hardware, software and systems verification to the next level of intelligent scanning by streamlining and optimizing verification cycles while helping to reduce verification costs, says Siemens EDA. This seamless approach to check cycle management emphasizes running market-specific and real-world workloads, frameworks and benchmarks at the start of the check cycle for power analysis. and performance. This allows customer-created virtual SoC models early in the lifecycle and integration to start running real-world firmware and software on Veloce Strato + for deep visibility down to the lowest level of hardware. Customers can then move the same design to Veloce Primo to validate software / hardware interfaces and run application level software while getting closer to actual system speeds. To make this approach as efficient as possible, Veloce Strato + and Veloce Primo use the same RTL, the same virtual verification environment, the same models to maximize the reuse of verification guarantees, environment and test content.

« As we enter the new semiconductor megacycle, the era of software-centric SoC design requires a radical change in functional verification systems to meet new demands. The introduction of the next-generation Veloce system that meets these key new requirements is a direct result of Siemens’ targeted investment to provide our customers with a complete and integrated system with a clear roadmap for the next decade. With today’s announcement, we are setting a new standard for a system capable of supporting new verification requirements for a diverse set of applications in computing and storage, AI / ML, 5G, networks and automotive Says Ravi Subramanian, senior vice president and general manager of Siemens EDA.

More info about Veloce

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